Motorola 68000

XC68000 chip prototype manufactured in 1979

The Motorola 68000 (MC68000) is a 16/32-bit CISC microprocessor designed and marketed by Motorola (currently produced by Freescale). Introduced in 1979, with HMOS technology, it was the first member of the successful 32-bit m68k family of microprocessors, software built for this processor is generally future-compatible with the rest of the line even though this first version is limited to a 16-bit external bus width. After more than four decades in production, the 68000 architecture is still in use.

It owes its name to the number of transistors it is made up of, this microprocessor has been used, among others, in the Commodore Amiga, the Atari ST, the first Macintosh, the Sharp X68000 and the first PCBs for arcade video games. Capcom. The MC68000 was released in 1980 and is the first in a family of microprocessors that consists of the Motorola 68010, Motorola 68020, Motorola 68030, Motorola 68040, and the Motorola 68060. This family of processors is often designated by the generic term 680x0, m68k, 68k, or 68000 family. Motorola also developed a successor to the 680x0: the Coldfire.

History

The 68000 arose from the MACSS (Motorola Advanced Computer System on Silicon) project, started in 1976 to develop an entirely new architecture without maintaining backward compatibility. processors. It would be the higher powered sibling to complement the 6800 8-bit product line rather than design a compatible line. Ultimately, the 68000 was provided with a compatibility mode bus protocol for peripheral devices of the 6800 line, and a version with an 8-bit data bus was produced. However, the designers focused primarily on future, or forward compatibility, which gave the M68K platform an advantage over later 32-bit architectures in the instruction set. For example, the CPU registers were 32-bit wide, although few stand-alone structures in the processor itself operate at 32-bit at a time. The MACSS team was very heavily influenced by the design of minicomputer processors, such as the PDP-11 and VAX systems, which have similar microcode.

Architecture

The 68000 is based on two banks of 8 32-bit registers. One bank is of data (Dn) and the other of pointers (An). It also contains a 32-bit program counter and a 16-bit status register, its upper part being the "System Byte" and the lower part the "User Byte".

Data registers (D0 to D7) can be used as 32-bit (.l), 16-bit (.w), and 8-bit (.b) registers. Any of them can be used as an accumulator, index, or pointer.

Made in HMOS technology and has 64 pins without signal multiplexing.

Address registers (pointers) are very similar to data registers, but they cannot be used as bytes and operations on them do not affect the carry so that address computations can be performed between data computations. Register A7 is the stack pointer (Stack Pointer) and is duplicated, having a stack for user mode and another for supervisor mode.

Contains two different ALUs, to operate with data and addresses independently and simultaneously.

Internal organization

Memory model

It is organized by the physical memory map and the functional memory map.

Model Records

They are all 32-bit, and are as follows:

• 8 data records (D0/D7).
• 8 address logs (A0/A7): A7 (SP) is broken down into two separate logs (supervisor or SSP stack pointer and user stack pointer or USP).
• 1 program counter or PC.
• 1 status record or SR: is divided into two bytes: the user byte (CCR) and the supervisor's byte (it is a privileged resource, because it can only be read and write in supervisory mode; in user mode it can only be read. In case of being modified in the last case, the microprocessor jumps to a privilege violation ISR).
  • The supervisor's byte is 8-bit, of which 3 are the interrupt mask, the S-bit or supervisor (indicates if it is in supervisory mode or user mode) and the T-bit or trace mode.

Addressing modes

Accepts the following addressing modes:

• Implicit (or inherent).
• Immediately.
  • Quick.
• Absolute:
  • Long Absolute.
  • Short Absolute.
• Straight to record.
  • Direct to data registration.
  • Direct to address registration.
• Indirect.
  • Indirect with post-increment.
  • Indirect with predecrement.
  • Indirect with displacement.
    • Indirect with index and displacement.
• Relative to PC with displacement.
  • Relative to PC with index and displacement.

External organization

MC68000 Pinouts

• Buses:
  • Address Bus (A1/A23): feature of high impedance. Just exit signals. The A0 bit does not go outside, but it is unfolded in two signals: UDS and LDS, both active in low, for the selection of a word and a pair or odd byte.
  • Data Bus (D0/D15): also has the high impedance feature, and is bidirectional (both in and out).
• Control:
  • Asynchronous bus control (AS', R/W', UDS', LDS' and DTACK').
  • Control of peripherals (E, VPA' and VMA'): E=CLK/10{displaystyle E=CLK/10}.
  • Control of bus arbitration (BR', BG' and BGACK').
  • Interruption control (IPL0', IPL1', IPL2' and IPL3').
  • Address Space Control (FC0, FC1 and FC2).
  • System control (RESET, HALT and BERR).
• Others:
  • Clock (CLK): with a working cycle of 50%.
  • Food and mass (VCC and GND): VCC− − GND=5V{displaystyle VCC-GND=5V}. During the normal operation an instant current requirement of up to 1,5A must be foreseen.

Exceptions on the MC68000

This microprocessor has three states: normal state, stop state, and exception state. It will jump to the last one on receiving both external and internal signals. It follows a vectorized exception model, whereby each exception is associated with a 1-byte vector number, fixed for each exception, except for external interrupts. This number is multiplied by 4 and the address of the exception vector in memory is obtained, which occupies 32 bits and is in the supervisor's data memory, except for the reset, which occupies twice as much (64 bits) and is in program memory supervisory. They are all grouped together in a table (called the Interrupt Vector Table), and it is located in the first 256 bytes of memory.

External signals

• Due to a RESET signal, which initializes the microprocessor.
• BERR signal, which indicates an error on the bus and jumps to the ISR error management on the bus.
• Interruptions: request for an interruption, through the IPL0', IPL1', IPL2' and IPL3' pins. The peripheral to request an interruption, if it is vectored, deposits the vector during the termination recognition cycle.

Internal cues

• Address error: indicates an invalid direction, as an impar of words (Word).
• Illegal or invalid instruction.
• A zero division (in the DIVU or DIVS division nemonic).
• During the range check (CHK).
• Detecting overflow.
• In the execution of a privileged instruction in user mode.
• During the execution step by step.
• Unconditional exception.

MC68000 Peripherals

MOTOROLA presented along with the microprocessor a range of peripherals aimed at creating a complete system:

• 68881: mathematical coprocessor.
• 68452: bus driver.
• 68454: Disc controller.
• 68681: serial communication.
• 68451: MMU.
• 68450: DMA.

The compatibility with the peripherals of its predecessor, the MC6800, was maintained, as for example with the VIA6522 (parallel communication through ports) and, in addition, it made efforts to maintain compatibility with devices from other manufacturers and collaborated in the IEEE VME protocol.

Utilization of the 68000 processor

By Apple

Apple used the 68000 processors in the Lisa and later in early Macintoshes (Macintosh 128, Mac 512, Mac Plus, Mac SE and Classic).

Later Macintoshes (LC series) used 68020 processors, later the Macintosh IIcx, IIci, IIfx, LCIII and SE/30 used the 68030.

Lastly, the Quadra and later LCs (LC475, LC630) had 68040 processors (these latter LCs used a non-floating-point version called the 68LC040).

With the arrival of the new generation of Macintosh, known under the name of Power Macintosh, Apple equipped its machines with PowerPC processors, manufactured by Motorola and IBM.

By Atari

In its Atari ST range. The following Atari TT030 and Atari Falcon models incorporated a 68030.

By Commodore

Commodore used the 68000 processors in the first Amiga model, the Amiga 1000, and later in its successors Amiga 500, Amiga 2000 and Amiga 600. It was also used in CDTV, Commodore's foray into interactive digital video domestic.

Later models such as the Amiga 3000, Amiga 1200, Amiga 4000 and CD32 used different processors from the family, such as the 68020, 68030 and 68040.

By Sharp

In his X68000 computers he used the 68000 and 68030 cores although the latter is from the X68030 Range.

By Sinclair

The Sinclair QL uses the 68008 variant, with an 8-bit bus.

By Sega

In its Mega Drive and Mega CD game consoles, as the main processor, and in the Sega Saturn as a sound processor, as well as in a whole range of arcade boards (Sega System 16, etc)

By Silicon Graphics

On their workstations, before moving to MIPS microprocessors.

By SNK

For the Neo Geo game console.

By Sun Microsystems

For your workstations, before moving to SPARC microprocessors.

By Texas Instruments

For your TI-89, TI-89 Titanium, TI-92, TI-92+, and Voyage 200 calculators.

By NeXT

NeXT machines used 68030 and 68040 processors.

By Palm

The Dragonball processor of the first generation of Palm PDAs (and other PalmOS devices produced by Handspring, IBM, Sony, TRGPro, Qualcomm, Symbol...) is derived from the 68000. The latest Palm PDAs use ARM processors.

• Produced only in 1989.

Second sources

Motorola offered very affordable second-source deals, with the only condition being that the other party develop some new device for the family, usually peripherals. Many companies met this requirement by renaming devices from their own families. This greatly contributed to the wide spread of the 68000, becoming an industry standard.

The following are some companies that made the 68000:

• Hitachi
• Mostek (Amazed by Intel's requirements for the 8086 license)
• SGS-Thomsom
• Philips