AMD Athlon

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Athlon is a series of x86-64 microprocessors designed by AMD for personal computers introduced in 1999.

AMD Athlon

The original Athlon, Athlon Classic, was the first seventh-generation x86 processor and initially maintained its performance lead over Intel microprocessors. AMD has continued to use the Athlon name for its eighth-generation Athlon 64 processors.

Classic Core

The Athlon processor was released on August 21, 1999. The first Athlon core, codenamed "K7" (in homage to its predecessor, the K6), it was initially available in 500 to 650 MHz versions, but later reached speeds of up to 1 GHz, making it the first processor to break the GHz barrier. The processor supports x86 architecture. and must be connected to motherboards with Slot A, which are mechanically, but not electrically, compatible with Intel's Slot 1.

Internally, the Athlon is a redesign of its predecessor, to which the floating point system was substantially improved (now there are 3 floating point units that can work simultaneously) and the first level cache (L1) was increased. to 128 KiB (64 KiB for data and 64 KiB for instructions). It also includes 512 KiB of second level cache (L2) external to the integrated circuit of the processor and working, in general, at half its speed (In the models with the highest frequency the cache worked at 2/5 [In the 750, 800 and 850 MHz] or 1/3 [On the 900, 950 and 1000 MHz] of the processor frequency). The communication bus is compatible with the EV6 protocol used in Alpha's DEC 21264 processors, running at a frequency of 100 MHz DDR (Dual Data Rate, 200 MHz effective).

The result was the most powerful x86 processor ever. The Athlon Classic was marketed until January 2002.

In economic terms, the Athlon Classic was a success, not only on its own merits and its low price compared to the competition, but also due to Intel's production problems.

Inside an Athlon Classic.

Thunderbird Core

The Athlon processor with the Thunderbird core appeared on the market on June 5, 2000, as the evolution of the Athlon Classic. Like its predecessor, it is also based on the x86 architecture and uses the EV6 bus. The clock speed range goes from 650 MHz to 1.4 GHz. Regarding the Athlon Classic, the Athlon Thunderbird changed from Slot A to the smaller Socket A, however, a small series of Thunderbirds was marketed in Slot format. TO.

All Athlon Thunderbirds integrate 128 KiB of first level (L1) cache (64 KiB of data and 64 KiB for instructions) and 256 KiB of second level (L2) cache on-die, running at the same frequency as the core. The manufacturing process used for all these microprocessors is 0.18µ (First made with aluminum interconnections and then, in those of 1 GHz or more, copper) and the package size is 117 mm².

There are two versions of the Thunderbird depending on the bus frequency they use. The first Athlon Thunderbirds used a 100MHz DDR (200 MHz effective) bus, just like the Athlon Classic. In the first quarter of 2001, new versions appeared, called Athlon-C, which supported a 133 MHz DDR bus (266 MHz effective).

The Athlon Thunderbird consolidated AMD as the second largest manufacturer of microprocessors, since thanks to its excellent performance (always surpassing the Pentium III and the first Pentium 4 from Intel at the same speed clock) and low price, made it very popular among both connoisseurs and those initiated in computing.

Athlon XP

When Intel released the 1.7 GHz Pentium 4 in April 2001, the Athlon Thunderbird was not up to their standards. It was also not practical for overclocking, so in order to continue to lead the performance of x86 processors, AMD had to design a new core, that's why he released the Athlon XP.

Palomino Core

AMD released the third major revision of the Athlon, codenamed "Palomino", on May 15, 2001. The main changes from the previous kernel were performance improvements that make it 10% more faster than an Athlon Thunderbird at the same clock speed. Its clock speed was between 1.3 and 1.7 GHz. In addition, the Palomino kernel was the first to include Intel's SSE instruction set, in addition to 3DNow! owned by AMD. The Palomino core was still having issues with heat dissipation, causing it to get too hot. Among the improvements of the Palomino with respect to the Thunderbird we can mention the prefetching of data by hardware, known in English as prefetch, and the increase in TLB entries, from 24 to 32.

Due to the performance improvements at the same clock speed over previous kernels, the Athlon XP were marketed not by their clock speed, but rather by a "performance index. relative" known as PR. This rating indicates the equivalent clock speed of a hypothetical "Athlon Thunderbird" with the same performance as an "Athlon XP". For example, the "Athlon XP" 1800+ actually runs at 1.53 GHz, but claims performance equivalent to a hypothetical "Athlon Thunderbird" at 1.8GHz. The idea quickly caught on among enthusiasts that the "PR" he was referring to a performance comparison with Intel's Pentium 4s, but this was never confirmed by AMD.

Thoroughbred Core

The fourth generation core of the Athlon, the Thoroughbred, commonly referred to as "Thoroughbred-A" It was launched on the market on June 10, 2002 at an initial speed of 1.80 GHz (2200 with the relative performance system). Due to stability problems, no superior model appeared with this kernel, although the lower models quickly did switch to the Thoroughbred kernel, and there are even 1700+ with a thoroughbred kernel.

The "Thoroughbred" it was manufactured using a 0.13 µm process, improving on the 0.18 µm "Palomino" core manufacturing process. Initially, aside from the improved manufacturing process, the Thoroughbred and Palomino kernels are virtually identical.

Soon afterward, AMD created a revision of the Thoroughbred kernel, called "Thoroughbred-B" which slightly increased the size of the core and added one more layer, thus solving the heat dissipation problems inherited from the Thunderbird core and enabling higher frequencies (it reached a relative performance of 2600+). Again, lower models came to be manufactured with this core.

The core "Thoroughbred-B" it reached 2133 MHz, an Athlon XP 2600+ with a 133 MHz bus (although in reality almost all 2600+ are at 2083 MHz with a 166 MHz bus, or already with a barton core (166 MHz bus and 1917 MHz)

Famous were the "pata negra" with stepping (code in the processor) JUIHB DLT3C, that was 1700+ that were able to get an overclock (frequency increase) of 1 GHz in some cases.

Barton Core

Athlon XP "Barton" 2800+.

The fifth generation Athlon core, called Barton, ran at a PR index of between 2600+ --1917 MHz on 166 MHz bus-- and 3200+ --2200 MHz with 200 bus--. There were Bartons with lower PRs, but they were low-power processors designed for laptops. The Athlon XP Mobile 2500+ (1833 MHz) was famous in the overclocking world because it allowed high frequencies to be reached.

The main feature of the Barton kernel compared to Thoroughbred-B was that it included a new 512 KiB second level cache (L2) instead of the 256 KiB of the Barton kernel. Thoroughbred. In addition AMD increased the frequency of the bus from 133 MHz (266 effective by DDR) to 166 MHz (333 MHz effective) and later up to 200 MHz (400 MHz effective).

With the release of the Barton-core Athlon XP, AMD once again claimed that its processors were the fastest x86 on the market, but some market benchmarks did not indicate this. This caused quite a stir when it became known that some of these tests, such as the BAPCo benchmarks, were designed by Intel engineers.

Thorton Core

The "Thorton" it is a variant of the "Barton", identical to it but with half of the second level (L2) cache disabled.

Mobile Athlon XP

Mobile Athlon XP (Athlon XP-M) are functionally identical to Athlon XP, but work with lower voltages. They also have PowerNow! technology, which reduces the operating speed of the processor when it has a low workload, to further reduce its consumption.

The Athlon XP-M uses the Socket 754 standard. They are generally used in laptops.

Successor

The successor to the Athlon and Athlon XP (seventh generation) is the Athlon 64.

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