AI-32

IA-32 (Intel Architecture, 32-bit), generically known as x86, x86-32, or i386, is Intel's most commercially successful processor instruction set architecture. It is a 32-bit extension, first implemented in the Intel 80386, from the older 16-bit Intel 8086,80186 and 80286 processors and the common denominator of all subsequent x86 designs. This architecture defines the instruction set for the family of microprocessors installed in the vast majority of personal computers in the world.

The longevity is due in part to full backwards compatibility and the fact that the architecture has also been extended to 64-bit, without breaking compatibility. This extension is known as Intel 64 by Intel or AMD64 by AMD (and generically referred to as x86-64 or x64) and is not related in any way to the IA-architecture. 64-bit interface implemented by Intel's Itanium series.

The IA-32 instruction set is commonly described as a CISC (Complex Instruction Set Computer) architecture, although such classifications have lost meaning with advances in microprocessor design. Modern x86 microarchitectures, such as K7, NetBurst, and others, are referred to as post-RISC processors.

History

The IA-32 instruction set was introduced in the Intel 80386 microprocessor in 1986 and laid the foundation for most microprocessors for more than 20 years. Although the instruction set has remained intact, successive generations of microprocessors that have them have become much faster. Within various programming language directives, IA-32 is still referred to as the "i386" architecture.

Intel was the inventor and is the largest supplier of IA-32 processors, but it is not the only one. The second largest vendor is AMD. There are other providers, but their quantities are small. In 2007, Intel moved to x86-64, but still makes IA-32 processors like the Celeron M for laptops. VIA Technologies continues to produce the VIA C3/C7 family of pure IA-32 devices, and AMD still produces the Geode line and IA-32 mobile processors.

In 2000, AMD announced a derivative of IA-32 called x86-64 (later renamed to AMD64), which added 64-bit computing capabilities. This extended architecture was later adopted by Intel with minor changes.

Successor architectures

AI-64

Intel's IA-64 architecture ("Intel Architecture, 64-bit"), released in 1999, is not directly compatible with the IA-32 instruction set, despite having a similar name. It has a completely different set of instructions and uses a VLIW design instead of out-of-order execution. IA-64 is the architecture used by the Itanium line of processors. Itanium initially included hardware support for IA-32 emulation, but it was very slow. Intel opted for the use of a software emulator.

Improvements include:

• 16 times the number of general purpose records (128 in total)
• 16 times the number of floating point records (128 in total)
• Record rotation mechanism to keep the values in the records for functions calls

X86-64

AMD64

AMD's AMD64 instruction set, initially called x86-64 when it was announced in 2000, is a 64-bit extension to IA-32 and thus maintains the heritage of the x86 family. While extending the instruction set, AMD took the opportunity to fix some instruction set behavior issues that have been around since its early 16-bit days, when the processor is in 64-bit mode.

Improvements include:

• 2 times the number of general purpose records (16 in total)
• 2 times the number of SSE records (16 in total)
• General purpose records are now really of general purpose, as their restrictions were removed.
• Most of the functionality of the segment records have been eliminated, as their use has consistently declined even in the days of IA-32.

Intel 64

In 2004, Intel announced the EM64T ("Extended Memory 64 Technology") instruction set, codenamed Yamhill or IA-32e, and later renamed Intel 64. It was derived from AMD64 and is generally compatible with code written for AMD64, although it is missing some AMD64 features. Intel started using it with the Xeon Nocona core in late 2004, introducing it to the PC's market with the Pentium 4 revision E0 in early 2005.