Advanced Programmable Interrupt Controller

Advanced Programmable Interrupt Controller or APIC is an interrupt controller, built into the central processing unit and designed by and for multithreading., specifically to be able to incorporate multiple microprocessors to the motherboard. Not to be confused with the "I/O APIC" of the motherboard that consists of an improvement of the classic PIC of the AT architecture and the advantage is that it offers more than 16 IRQs and a faster handling of them.

Summary

There are two components to an Intel APIC system, the Local APIC (LAPIC) and the I/O APIC (input/output). The LAPIC is integrated into each CPU in the system and the I/O APIC is used by the peripheral bus system. There is normally one I/O APIC for each peripheral bus in the system. In the original system design, the LAPICs and APIC I/Os are connected by a dedicated APIC bus. Newer systems use the system bus for communication between all APIC components.

In systems containing an 8259 PIC, the 8259 can be connected to the LAPIC on the BSP (System's bootstrap processor), or on one of the system's APIC I/Os

APIC Local

LAPICs handle all external interrupts for the processor of which they are a part. In addition, it is capable of accepting and generating Interprocessor Interrupts (IPIs) between LAPICs. It can support up to 224 IRQ vectors of a LAPIC I/O. Numbers 0 through 31 are reserved for exception handling on x86 processors.

APIC I/O

I/O APICs contain the redirection table, which is used to route interrupts they receive from the peripheral buses to one or more Local APICs.